insider brief
- Researchers have proposed a transistor-based thermodynamic computing architecture that rivals GPU-based performance while consuming about 10,000 times less energy.
- The system uses stochastic hardware, Boltzmann machines, and denoising models to generate output by gradually converting random noise into structured data.
- Results are based on simulations and tested random circuits, and scaling to larger AI workloads is not yet addressed.
As artificial intelligence drives unprecedented construction of power-hungry data centers, researchers are exploring computing architectures beyond graphics processing units (GPUs). One new proposal to address this is stochastic computers built from traditional transistors, which researchers say could perform certain AI tasks with a fraction of the energy required by today’s hardware.
This research npj unconventional computingdescribes what researchers call denoising thermodynamic computer architecture (DTCA). Rather than relying on deterministic computations like traditional processors, the proposed architecture uses controlled randomness to perform probabilistic computations directly in hardware. The authors estimate that for simple image generation benchmarks, such a system could match GPU-based performance, consuming about 10,000 times less energy per generated sample.
The study was led by researchers at Extropic and the Massachusetts Institute of Technology, including quantum information scientist Isaac Chuang.
Although the proposed computer is completely classical and does not perform quantum computations, the underlying concepts will be familiar to many in the quantum computing community. The architecture leverages ideas from statistical mechanics, Boltzmann machines, and the Ising model, which are mathematical frameworks also used in quantum annealing and quantum-inspired optimization.
Alongside quantum computers, neuromorphic processors, photonic accelerators, and analog AI chips, thermodynamic computing has emerged as another candidate architecture aimed at improving the efficiency of specialized workloads.
Beyond the GPU
This research focuses on an issue that is becoming increasingly difficult for the AI industry to ignore.
“Unprecedented recent investments in large-scale AI systems will soon strain the world’s energy infrastructure,” the researchers wrote. “Each year, U.S. companies spend more on AI-centric data centers than the inflation-adjusted cost of the Apollo program. By 2030, these data centers could consume about 10% of all energy produced in the United States.”
The problem is that training and deploying large-scale AI models requires vast computing resources, prompting billions of dollars of investment in new data centers and raising concerns about future power demands. The researchers suggest that rather than trying to make existing GPU architectures incrementally more efficient, the AI algorithms themselves are shaped by the available hardware, a phenomenon sometimes referred to as the “hardware lottery.” They suggest that different hardware may enable fundamentally different and potentially more energy-efficient approaches to machine learning.
Their proposal focuses on probabilistic computing, a field that performs calculations by manipulating probability distributions, rather than relying solely on deterministic arithmetic.
Traditional stochastic computers typically implement large-scale energy-based models directly in hardware. Although these systems are attractive in principle, they become increasingly difficult to sample efficiently as the data becomes more complex. The resulting speed reduction largely offsets the theoretical efficiency advantage.
This study attempts to overcome that limitation by borrowing concepts from diffusion models, one of the machine learning techniques behind modern image generators.
Rather than asking one large probabilistic model to represent the entire dataset, the researchers divided the task into a series of simpler denoising steps. Each step progressively transforms random noise into structured data, reducing the computational burden on individual models while avoiding what the authors call the “mixed expressiveness trade-off” that has limited previous probabilistic hardware.
All transistor design
Research shows that unlike some previous proposals for probabilistic computing, this architecture does not rely on specialized hardware components.
The researchers instead designed a system around traditional CMOS transistors, using transistor circuits specifically designed to generate programmable random numbers. These random bits form the basis of the probability calculations performed throughout the chip.
The proposed architecture organizes thousands of sampling circuits into an array that implements a sparse Boltzmann machine. A Boltzmann machine is an AI model that learns patterns in data by assigning probabilities to different possible outcomes. Rather than building one large probabilistic model, chain together multiple smaller models to gradually refine noisy data into meaningful output.
The researchers say the modular design could eventually be implemented in several ways, including multiple dedicated hardware blocks on a single chip or a collection of communication chips that perform different stages of computation.
To support the feasibility of the hardware, the team built and tested an experimental transistor-based random number generator. Laboratory measurements show that the circuit behaves as expected and remains robust even when simulating manufacturing variations that commonly occur during semiconductor manufacturing.
Benchmark results
To evaluate the architecture, the researchers simulated the proposed hardware using a GPU while incorporating measurements from a physical random number generator into the energy model.
The primary benchmark used was Fashion-MNIST, a relatively simple image dataset often used to evaluate machine learning algorithms.
The researchers estimate that this architecture can generate images with performance comparable to GPU implementations while consuming about 10,000 times less energy per generated sample. This estimate reflects the expected energy consumption of future hardware implementations, rather than measurements from a fully operational computer.
The team also considered a hybrid approach that combines traditional neural networks with thermodynamic hardware. The researchers found that by using a small neural network to compress CIFAR-10 images into a binary representation before processing on a probabilistic computer, they could achieve performance comparable to traditional generative adversarial networks while using about 10 times fewer neural network parameters in the deterministic part of the system.
According to the researchers, this hybrid architecture may ultimately prove more practical than expecting probabilistic hardware to solve every aspect of machine learning independently.
Relevance beyond AI
Although this research focuses on AI inference, it may also have implications for the diversification of computing hardware.
For decades, computing improvements relied heavily on scaling general-purpose processors until GPUs became the primary accelerator for machine learning. But today, researchers are increasingly envisioning future computing systems built from multiple specialized processors, including quantum computers, each optimized for a specific workload.
Quantum computers are expected to address specific optimization, chemistry, and cryptographic problems. Photonic processors aim to use light to speed up neural networks. Neuromorphic chips emulate aspects of the biological brain for energy-efficient inference.
Thermodynamic computing represents another attempt to identify workloads that can benefit from specialized hardware based on statistical physics rather than traditional digital logic.
For quantum computing researchers, this work also shows that ideas borrowed from physics, such as the Boltzmann distribution, stochastic sampling, and the Ising model, are becoming increasingly influential across new computing architectures.
Next steps and challenges
Despite the promising energy estimates, the researchers are quite wary of the limitations of their work.
For example, the reported results rely on simulations rather than full hardware implementation. Only transistor-based random number generators have been physically demonstrated, and broader computing architectures remain theoretical. The benchmark datasets Fashion-MNIST and CIFAR-10 are also much simpler than modern large-scale language models or state-of-the-art image generation systems.
The researchers also acknowledge that they have yet to figure out how to scale these systems to represent increasingly complex data while maintaining efficient sampling, one of the central challenges facing probabilistic computing.
Simply increasing the size or connectivity of a probabilistic model will ultimately reduce its effectiveness, suggesting that further algorithmic advances will be needed before the architecture can handle the largest AI workloads. The research team suggests that future advances will likely rely on tighter integration between probabilistic hardware and traditional neural networks, rather than replacing existing AI accelerators entirely.
Although there are still challenges, the researchers added that the study should be seen as a solid “first step” toward new AI systems worthy of further investment and investigation.
“The extensive analysis presented in this manuscript ranges from high-level algorithmic ideas to laboratory measurements of new analog circuits, demonstrating for the first time that probabilistic computing systems can significantly outperform traditional AI hardware,” the researchers wrote. “Overall, this work makes a compelling case for significant investment in the continued development of low-energy probabilistic computing systems.”
