<(From left) Dr. Kang Seok-kyung and Professor Kim Sang-ha from the Department of Mechanical Engineering>
The performance and stability of smartphones and artificial intelligence (AI) services depend on how uniformly and accurately semiconductor surfaces are processed. KAIST researchers have extended the concept of everyday “sandpaper” to the realm of nanotechnology and developed a new technology that can process semiconductor surfaces uniformly down to the atomic level. This technology shows the potential to significantly improve surface quality and processing accuracy in advanced semiconductor processes such as high-bandwidth memory (HBM).
KAIST (Chairman Lee Kwang-hyung) announced on February 11 that a research team led by Professor Sana Kim of the Department of Mechanical Engineering has developed “nano sandpaper,” which uses carbon nanotubes tens of thousands of times thinner than a human hair as an abrasive material. This technology proposes a new planarization technology that enables more precise surface processing than existing semiconductor manufacturing processes and reduces the environmental impact generated during manufacturing.
Sandpaper is a familiar tool used to rub and smooth surfaces, but it has been difficult to apply it to fields that require extremely precise surface processing, such as semiconductors. This limitation is due to the fact that conventional sandpaper is manufactured by pasting abrasive particles with adhesive, which makes it difficult to evenly fix extremely fine particles.
To overcome these limitations, the semiconductor industry has adopted a planarization process known as chemical mechanical polishing (CMP). This process uses a chemical slurry in which abrasive particles are dispersed in a liquid. However, this method requires additional cleaning steps and generates large amounts of waste, which complicates the process and puts a strain on the environment.
To address these issues, the research team extended the sandpaper concept to the nanoscale. Nanosandpaper was created by vertically arranging carbon nanotubes, fixing them in polyurethane, and partially exposing them to the surface. This structure prevents the abrasive from peeling off, so there is no need to worry about surface damage, and it maintains stable performance even after repeated use.
The newly developed nano-sandpaper has achieved a polishing density approximately 500,000 times that of the finest commercially available sandpaper. The accuracy of sandpaper is expressed by the “abrasive grain density (grit number),” which indicates how closely the abrasive grains are arranged on the surface. While everyday sandpaper typically ranges from 40 to 3000 grit, nano sandpaper has over 1,000,000,000 grit. This extremely dense structure allowed the surface to be machined with precision down to a few nanometers, which corresponds to a thickness of just a few atoms.
The effectiveness of nano-sandpaper was confirmed through experiments. Rough copper surfaces are polished to nanometer-level smoothness, and in semiconductor pattern planarization experiments, this technique reduced dishing defects by up to 67% compared to traditional CMP processes. A dishing defect is a phenomenon in which the center of an interconnect is depressed, and is a major defect that affects the performance and reliability of advanced semiconductors such as HBM.
In particular, it fixes the abrasive material to the sandpaper surface, eliminating the need for a continuous supply of slurry solution as in traditional processes. This reduces cleaning steps, eliminates waste slurry, and offers the potential to move semiconductor manufacturing to more environmentally friendly processes.
The research team expects this technology to be applied to advanced semiconductor planarization processes such as HBM used in AI servers, and hybrid bonding processes that are attracting attention as next-generation semiconductor interconnection technology. This research is also significant in that it extends the everyday concept of sandpaper to nano-precision processing technology and suggests the possibility of securing the core technology necessary for semiconductor manufacturing.
Professor Sanha Kim said, “This is a unique study that demonstrates that the everyday concept of sandpaper can be extended to the nanoscale and applied to ultra-fine semiconductor manufacturing,” adding, “We hope that this technology will not only lead to improved semiconductor performance but also environmentally friendly manufacturing processes.”
Dr. Sukkyung Kang from the Department of Mechanical Engineering participated in this study as the first author. This research was recognized for its excellence and received the Gold Award (1st place) in the mechanical engineering category at the 31st Samsung Human Tech Paper Awards sponsored by Samsung Electronics. The findings were published online in the international journal Advanced Composites and Hybrid Materials (IF 21.8) on January 8, 2026.
*Paper title: “Carbon nanotube sandpaper for atomic precision surface finishing”
DOI: https://doi.org/10.1007/s42114-025-01608-3
This research was supported by the National Research Foundation of Korea (Mid-Career Researcher Program, Ministry of Science, Information and Communications, NRF, RS-2025-00560856), Glocal Lab Program (Ministry of Education, NRF, RS-2025-25406725), InnoCORE Program (Ministry of Science, Information and Communications, NRF, N10250154), and KAIST Jump Up. research program.
/Open to the public. This material from the original organization/author may be of a contemporary nature and has been edited for clarity, style, and length. Mirage.News does not take any institutional position or position, and all views, positions, and conclusions expressed herein are those of the authors alone. Read the full text here.
